Profile
Image: 
Title: 
Dr.
Surname: 
Yemişcioğlu
Status: 
Full-Time Academic Staff
Program: 
Electrical and Electronics Engineering
Role: 
Lecturer
Telephone: 
+90 392 661 2929
E-mail: 
gurtacatmetu.edu.tr
Room: 
R211
Educational Background: 
  • Bachelor of Engineering (B.Eng), Computer Systems Engineering with a year in Industry, University of Kent, Canterbury
  • Ph.D., in Electronics Engineering, University of Kent, Canterbury
Research Interests: 
  • Adiabatic Logic Circuit
  • Low-power Digital VLSI Design
  • Quantum Cellular Automata
  • Beyond CMOS Techniques
Courses Taught: 
  • EEE248 | CNG232: Logic Design
  • EEE347 | CNG336: Introduction to Microprocessors | Introduction to Embedded Systems
  • EEE413: Introduction to VLSI Design
  • EEE 493: Engineering Design I
  • EEE 494: Engineering Design II
Selected Publications: 
  • A. Mamdouh, M. Mjema, G. Yemiscioglu, S. Kondo and A. Muhtaroglu, "Design of Efficient AI Accelerator Building Blocks in Quantum-Dot Cellular Automata (QCA)," in IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol. 12, no. 3, pp. 703-712, Sept. 2022, doi: 10.1109/JETCAS.2022.3202043.
  • S. Mohaghegh, S. Kondo, G. Yemiscioglu and A. Muhtaroglu, "A Novel Multiplier Hardware Organization for Finite Fields defined by All-One Polynomials," in IEEE Transactions on Circuits and Systems II: Express Briefs, 2022, doi: 10.1109/TCSII.2022.3188567.
  • S. Mohaghegh, G. Yemişçioglu and A. Muhtaroğlu, "Low-Power and Area-Efficient Finite Field Multiplier Architecture Based on Irreducible All-One Polynomials," 2020 IEEE International Symposium on Circuits and Systems (ISCAS), 2020, pp. 1-5, doi: 10.1109/ISCAS45731.2020.9181179.
  • G. Yemiscioglu and P. Lee, "Very-large-scale integration implementation of a 16-bit clocked adiabatic logic logarithmic signal processor," in IET Computers & Digital Techniques, vol. 9, no. 5, pp. 239-247, 9 2015, doi: 10.1049/IET-CDT.2014.0102.
  • G. Yemiscioglu and P. Lee, "16-Bit Clocked Adiabatic Logic (CAL) logarithmic signal processor," 2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS), 2012, pp. 113-116, doi: 10.1109/MWSCAS.2012.6291970.
  • G. Yemiscioglu and P. Lee, "16-Bit Clocked Adiabatic Logic (CAL) Leading One Detector for a Logarithmic Signal Processor," PRIME 2012; 8th Conference on Ph.D. Research in Microelectronics & Electronics, 2012, pp. 1-4.